Here are the step to run the demo

Each lab station has 2 machines.
--------------------------------
The top machine is where your account and project files are located.
The bottom machine is connected to your Xilinx FPGA boad.

Your Project will be done in the ~/XILINX directory located in
your home directory (NOT in the ~/SYNOPSYS directory).

"venus2.ces.cwru.edu" is the machine that you are logging in
and designing your project on.

"neptune.ces.cwru.edu" is the bottom machine which downloads
the bit file to the FPGA board.

On venus2.ces.cwru.edu
----------------------
(0) If your default shell is not cshell then type: /bin/csh

(1) a) source /local/eda/synopsys_setup.csh

    b) df -k
       
       # Should look like the following

       Filesystem            kbytes    used   avail capacity  Mounted on
       /proc                      0       0       0     0%    /proc
       /dev/dsk/c0t3d0s0     686374  278119  353346    45%    /
       fd                         0       0       0     0%    /dev/fd
       /dev/dsk/c0t3d0s7     153031   26266  111462    20%    /home
       swap                  166012     636  165376     1%    /tmp
       seven:/local         1201951  191553  998379    17%    /local
       seven:/home2/synopsys
                            2812303 2367272  388785    86%    /home2/synopsys
       seven:/dhome         1276087  645140  618187    52%    /dhome

       # If any of the last 4 lines (i.e. three with "seven:") are not there
       # then email to the instructor.

(2) cd ~/XILINX

(3) ls -l

    There should be two hello files in the XILINX directory.
    hello.make        - This is the source script file to synthesize your design
    hello.vhd         - This is the source file for the xilinx demo board
    hello.cst         - This file maps the vhdl ports to xilinx pins

(4) more hello.make

    This shows how to call make_xilinx_fpga so in future assignments
    you can write your own make file.

    chmod +x filename

    this will make a file read, write, and executable

(4) ./hello.make

    The "./" executes the program from your local directory
    This does the whole synthesis process and creates a hello.bit file
    the hello.bit file contains the bit file for the Xilinx fpga
    CLB configuration

On neptune.ces.cwru.edu
-----------------------
(5) a) telnet neptune.ces.cwru.edu
       # Note: This is your alternate machine which has the
       # xchecker cable connected to it. 

    b) cd /solaris/venus2/XILINX
       # Note: your directory should appear exactly as it is on venus2

    c) Make source the serial cable is connected to the Workstation and Board

    d) Make sure the power is connected to the board and is turned on.

    e) ./xchecker hello.bit
       # Note: the .bit file contains the bits to configure
       # the Xilinx fpga.
       # xchecker: This downloads the hello.bit file to the Xilinx chip.

(6) The web site contains the hardware manual for the board.

(7) The LEDs should say.....