EECS 316: FPGA LAB Deadline 11 April 2005
In this Lab you will model a finite state machine (FSM) in VHDL,
encode the FSM states and implement it as a sequential circuit using Synopsys.
You will then simulate the circuit to verify its behavior. Finally, you
will download the circuit code onto the FPGA board, and validate the
hardware circuit using the I/O switches and display LEDs.
The example FSM controls a FIFO Queue but to be practical, consider that
we want to design a simple digital controller which monitors cars entering
and leaving a parking lot. The operation specs are as follows.
- The controller maintains the current COUNT of the total number of cars
parked in the lot.
- The lot has a limited number of parking spots, for simplicity twenty (20).
- There are two input sensors at the entrance and exit of the lot.
The sensors provide input signals to the controller as cars pass by
and the controller increments/decrements the current COUNT.
What if two cars enter and exit simultaneously?
- If COUNT=20, then the controller issues a FULL output signal, otherwise
the OPEN output signal is on.
- There is a manual input for the lot attendant to override the COUNT
for special vehicles.
- A START/STOP input is also available to the attendant, with the
STOP input causing a CLOSED output signal.
- Describe your specs using a flow chart.
- Model your specs and flow chart as an FSM, clearly defining its states,
state transitions inputs and outputs.
- Build a behavioral VHDL model of the FSM. Use your own state assignment
and encoding to describe the entire FSM and I/O in VHDL.
- Design your FSM using Synopsys, mapping the FSM into a gate level
- Simulate your circuit to verify its behavior.
- Prepare your circuit code to download onto the Xilinx FPGA board.
Review your design carefully to determine the FPGA inputs and outputs
for emulating the circuit. Use some LEDs for outputs. Are there any
modifications or code revisions necessary?
- Download your circuit code and then validate its behavior using the I/O
switches, LEDs and possibly the HP analyzer.
- Prepare a report of your experience, including description of the
methodology, charts, code and documentation, simulation results, and
- You should demonstarte your working experiment to the Lab assistant.