8051 embedded processor summary (print using Landscape Mode)

NotationDescription Alternative
A 8 bit Accumulator as Register reference=ACC
ACC 8 bit Accumulator as Memory reference =M[0xE0]
B 8 bit B register =M[0xF0]
Ri 8 bit Address registers R0,R1
Rn 8 bit Data registers R0,R1,R2,R3,R4,R5,R6,R7
DPTR 16 bit Data Pointer DPTR=DPH:DPL
DPH Data Pointer High =M[0x84]
DPL Data Pointer Low =M[0x83]
PC 16 bit Program Counter PC=PCH:PCL
SP 8 bit Stack Pointer =M[0x81]
PSW Program Status Word =B[0xD0..0xD7] =M[0xD0]
C Carry Flag =PSW.7 =B[0xD7] =M.7[0xD0]
AC Auxilary Carry Flag =PSW.6 =B[0xD6] =M.6[0xD0]
F0 General Purpose User Flag =PSW.5 =B[0xD5] =M.5[0xD0]
RS1 Register Bank Select bit 1=PSW.4 =B[0xD4] =M.4[0xD0]
RS0 Register Bank Select bit 0=PSW.3 =B[0xD3] =M.4[0xD0]
OV Overflow Flag =PSW.2 =B[0xD2] =M.2[0xD0]
P Parity Flag =PSW.0 =B[0xD0] =M.0[0xD0]
int8 8 bit integer immediate data immed8 =i7i6i5i4i3i2i1i0
addr8 8 bit direct address addr8=a7a6a5a4a3a2a1a0
addrH 8 bit direct High address addrH =a15a14a13a12a11a10a9a8
pagenaddress code pagepage =a10a9a8
addr11 11 bit addressaddr11 =page:addr8 =a10a9a8a7a6a5a4a3a2a1a0
M[addr8]Byte Data Memory Internal Memory 0x00 to 0xff which maps ;
BM[bit8] Bit Data Memory bit8=b7b6b5b4b3b2b1b0
B[0x00..bit8..0x7f]
=M[0x20..0x2f]
=M.b2b1b0[0010b6b5b4b3]

and
B[0x80..bit8..0xff]
=M[0x80,0x88,0x90,0x98,...,0xf0,0xff]
=M.b2b1b0[1b6b5b4b3000];

XM[addr8]External Byte Data Memory External Memory 0x0000 to 0xffff;
CodeM[addr8]Instruction Code Memory Code Memory 0x0000 to 0xffff

Instructions by machine format
f3f2f1f0 OP A,#int8

[ffff 0100][int8]

 OP A,direct8

[ffff 0101][direct8]

 OP A,@Ri

[ffff 011i]

 OP A,Rn

[ffff 1nnn]

 OP direct8,A

[ffff 0010][direct8]
0000 INC #int8=#1XXX
0001 DEC #int8=#1XXX
0010 ADD XXXX
0011 ADDCXXXX
0100 ORL XXXXX
0101 ANL XXXXX
0110 XRL XXXXX
1001 SUBBXXXX
1100 XCH XXX
1101 XCHD XXX
1110 MOV XXX
f3f2f1f0 MOV direct8,SRC

[ffff 0101][direct8]

 MOV @Ri,SRC

[ffff 011i]

 MOV Rn,SRC

[ffff 1nnn]
0111 MOV dst,#i8 XXX
1010 MOV dst,a8 XX
1111 MOV dst,A XXX

Instructions by opcode
0x000x010x020x03 0x040x050x060x07 0x080x090x0a0x0b 0x0c0x0d0x0e0x0f
0x00 NOPAJMP page0LJMPRR A INC AINC a8INC @R0INC @R1 INC R0INC R1INC R2INC R3 INC R4INC R5INC R6INC R7
0x10 JBC rel8ACALL page0LCALLRRC A DEC ADEC a8DEC @R0DEC @R1 DEC R0DEC R1DEC R2DEC R3 DEC R4DEC R5DEC R6DEC R7
0x20 JB rel8AJMP page1RETRL A ADD A,#i8ADD A,a8ADD A,@R0ADD A,@R1 ADD A,R0ADD A,R1ADD A,R2ADD A,R3 ADD A,R4ADD A,R5ADD A,R6ADD A,R7
0x30 JNB rel8ACALL page1RETIRLC A ADDC A,#i8ADDC A,a8ADDC A,@R0ADDC A,@R1 ADDC A,R0ADDC A,R1ADDC A,R2ADDC A,R3 ADDC A,R4ADDC A,R5ADDC A,R6ADDC A,R7
0x40 JC rel8AJMP page2ORL a8,AORL a8,#i8 ORL A,#i8ORL A,a8ORL A,@R0ORL A,@R1 ORL A,R0ORL A,R1ORL A,R2ORL A,R3 ORL A,R4ORL A,R5ORL A,R6ORL A,R7
0x50 JNC rel8ACALL page2ANL a8,AANL a8,#i8 ANL A,#i8ANL A,a8ANL A,@R0ANL A,@R1 ANL A,R0ANL A,R1ANL A,R2ANL A,R3 ANL A,R4ANL A,R5ANL A,R6ANL A,R7
0x60 JZ rel8AJMP page3XRL a8,AXRL a8,#i8 XRL A,#i8XRL A,a8XRL A,@R0XRL A,@R1 XRL A,R0XRL A,R1XRL A,R2XRL A,R3 XRL A,R4XRL A,R5XRL A,R6XRL A,R7
0x70 JNZ rel8ACALL page3ORL C,b8JMP @A+DPTR MOV A,#i8MOV a8,#i8MOV @R0,#i8MOV @R1,#i8 MOV R0,#i8MOV R1,#i8MOV R2,#i8MOV R3,#i8 MOV R4,#i8MOV R5,#i8MOV R6,#i8MOV R7,#i8
0x80 SJMP rel8AJMP page4ANL C,b8MOVC A, @A+PC DIV ABMOV a8,a8MOV a8,@R0MOV a8,@R1 MOV a8,R0MOV a8,R1MOV a8,R2MOV a8,R3 MOV a8,R4MOV a8,R5MOV a8,R6MOV a8,R7
0x90 MOV DPTR, #i16ACALL page4MOV b8,CMOVC A, @DPTR SUBB A,#i8SUBB A,a8SUBB A,@R0SUBB A,@R1 SUBB A,R0SUBB A,R1SUBB A,R2SUBB A,R3 SUBB A,R4SUBB A,R5SUBB A,R6SUBB A,R7
0xa0 ORL C,/b8AJMP page5MOV C,b8INC DPTR MUL AB --- MOV @R0,a8MOV @R1,a8 MOV R0,a8MOV R1,a8MOV R2,a8MOV R3,a8 MOV R4,a8MOV R5,a8MOV R6,a8MOV R7,a8
0xb0 ANL C,/b8ACALL page5CPL b8CPL C CJNE A,#i8, rel8CJNE a8,#i8, rel8CJNE @R0,#i8, rel8CJNE @R1,#i8, rel8 CJNE R0,#i8, rel8CJNE R1,#i8, rel8CJNE R2,#i8, rel8CJNE R3,#i8, rel8 CJNE R4,#i8, rel8CJNE R5,#i8, rel8CJNE R6,#i8, rel8CJNE R7,#i8, rel8
0xc0 PUSH a8AJMP page6CLR b8CLR C SWAP AXCH A,a8XCH A,@R0XCH A,@R1 XCH A,R0XCH A,R1XCH A,R2XCH A,R3 XCH A,R4XCH A,R5XCH A,R6XCH A,R7
0xd0 POP a8ACALL page6SETB b8SETB C DA ADJNZ a8,rel8XCHD A,@R0XCHD A,@R1 XCHD A,R0XCHD A,R1XCHD A,R2XCHD A,R3 XCHD A,R4XCHD A,R5XCHD A,R6XCHD A,R7
0xe0 MOVX A, @DPTRAJMP page7MOVX A,@R0MOVX A,@R1 CLR AMOV A,a8MOV A,@R0MOV A,@R1 MOV A,R0MOV A,R1MOV A,R2MOV A,R3 MOV A,R4MOV A,R5MOV A,R6MOV A,R7
0xf0 MOVX @DPTR, AACALL page7MOVX @R0,AMOVX @R1,A CPL A MOV a8,AMOV @R0,AMOV @R1,A MOV R0,AMOV R1,AMOV R2,AMOV R3,A MOV R4,AMOV R5,AMOV R6,AMOV R7,A

Instructions by operation
CyclesMachine Assembler PC Operation Flags
2 [a10a9a810001][addr8] ACALL addr11 PC+=2;M[++SP]=PCL; M[++SP]=PCH; PC10-0=addr11
1 [00101nnn] ADD A,Rn PC++; A += Rn; C OV AC
1 [00100101][addr8] ADD A,direct8PC++; A += M[addr8]; C OV AC
1 [0010011i] ADD A,@Ri PC++; A += M[Ri]; C OV AC
1 [00100100][int8] ADD A,#int8PC+=2;A += int8; C OV AC
1 [00111nnn] ADDC A,Rn PC++; A = A + Rn + C; C OV AC
1 [00110101][addr8] ADDC A,direct8PC+=2;A = A + M[addr8] + C;C OV AC
1 [0011011i] ADDC A,@Ri PC++; A = A + M[Ri] + C; C OV AC
1 [00110100][int8] ADDC A,#int8PC+=2;A = A + int8 + C;C OV AC
2 [a10a9a800001][addr8] AJMP addr11 PC+=2;PC10-0=addr11
1 [01011nnn] ANL A,Rn PC++; A &= Rn;
1 [01010101][addr8] ANL A,direct8PC+=2;A &= M[addr8];
1 [0101011i] ANL A,@Ri PC++; A &= M[Ri];
1 [01010100][int8] ANL A,#int8PC+=2;A &= int8;
1 [01010010][addr8] ANL direct8,APC+=2;M[addr8] &= A;
2 [01010011][addr8][int8]ANL direct8,#int8PC+=3;M[addr8] &= int8;
2 [01010010][bit8] ANL C,bit8 PC+=2;C &= BM[bit8];
2 [01010000][bit8] ANL C,/bit8 PC+=2;C &= ~BM[bit8];
2 [10110101][addr8][rel8] CJNE A,direct8,rel8PC+=3;if (A!=M[addr8]) { PC=PC+rel8; }
else { C=(A<M[addr8])?:1:0; }		C
2 [10110100][int8][rel8] CJNE A,#int8,rel8PC+=3;if (A!=int8) { PC=PC+rel8; }
else { C=(A<int8)?:1:0; }		C
2 [10111nnn][int8][rel8] CJNE Rn,#int8,rel8PC+=3;if (Rn!=int8) { PC=PC+rel8; }
else { C=(Rn<int8)?:1:0; }		C
2 [1011011i][int8][rel8] CJNE @Ri,#int8,rel8PC+=3;if (M[Ri]!=int8) { PC=PC+rel8; }
else { C=(M[Ri]<int8)?:1:0; }		C
1 [11100100] CLR A PC++; A=0;
1 [11000011] CLR C PC++; C=0; C
1 [11000010][bit8] CLR bit8 PC+=2;BM[bit8]=0;
1 [11110100] CPL A PC++; A=~A;
1 [11010011] CPL C PC++; C=~C; C
1 [11010010][bit8] CPL bit8 PC+=2;BM[bit8]=~BM[bit8];
1 [11010100] DA A PC++; if (A3-0>9 & AC=1) { A3-0+=6; }
if (A7-4>9 & C=1) { A7-4+=6; }
1 [00010100] DEC A PC++; A--;
1 [00011nnn] DEC Rn PC++; Rn--;
1 [01010101][addr8] DEC direct8 PC+=2;M[addr8]--;
1 [0001011i] DEC @Ri PC++; M[Ri]--;
4 [10000100] DIV AB PC++; A=A / B; B=A % B; C OV
2 [10110101][rel8] DJNE Rn,rel8 PC+=2;Rn--; if (Rn!=0) { PC=PC+rel8; }
2 [10110101][addr8] DJNE Rn,direct8PC+=3;M[addr8]--; if (M[addr8]!=0) { PC=PC+rel8; }
1 [00000100] INC A PC++; A++;
1 [00001nnn] INC Rn PC++; Rn++;
1 [01000101][addr8] INC direct8 PC+=2;M[addr8]++;
1 [0000011i] INC @Ri PC++; M[Ri]++;
2 [10100011] INC DPTR PC++; DPTR++;
2 [00100000][bit8][rel8] JB bit8,rel8PC+=3;if (BM[bit8]==1) { PC=PC+rel8; }
2 [00010000][bit8][rel8] JBC bit8,rel8PC+=3;if (BM[bit8]==1) { BM[bit8]=0; PC=PC+rel8; }
2 [01000000][rel8] JC rel8 PC+=2;if (C==1) { PC=PC+rel8; }
2 [01110011] JMP @A+DPTR PC++; PC=A+DPTR; }
2 [00110000][bit8][rel8] JNB bit8,rel8PC+=3;if (BM[bit8]==0) { PC=PC+rel8; }
2 [01010000][rel8] JNC rel8 PC+=2;if (C==0) { PC=PC+rel8; }
2 [01110000][rel8] JNZ rel8 PC+=2;if (A!=0) { PC=PC+rel8; }
2 [01100000][rel8] JZ rel8 PC+=2;if (A==0) { PC=PC+rel8; }
2 [01100000][addrH][addr8]ACALL addr16 PC+=3;M[++SP]=PCL; M[++SP]=PCH; PC=addr16;
2 [01100000][addrH][addr8]LJMP addr16 PC+=3;PC=addr16;
1 [11101nnn] MOV A,Rn PC++; A=Rn;
1 [11100101][addr8] MOV A,direct8PC++; A=M[addr8];
1 [1110011i] MOV A,@Ri PC++; A=M[Ri];
1 [01110100][int8] MOV A,#int8PC+=2;A=int8;
1 [11111nnn] MOV Rn,A PC++; Rn=A;
2 [10101nnn][addr8] MOV Rn,direct8PC+=2;Rn=M[addr8];
1 [01111nnn][int8] MOV Rn,#int8PC+=2;Rn=int8;
1 [11110101][addr8] MOV direct8,APC++; M[addr8]=A;
2 [10001nnn][addr8] MOV direct8,RnPC+=2;M[addr8]=Rn;
2 [10000101][src8][dst8] MOV dst8,src8 PC+=3;M[dst8]=M[src8];
2 [1000011i][addr8] MOV direct8,@RiPC+=2;M[addr8]=M[Ri];
2 [01110101][addr8][int8]MOV direct8,#int8PC+=3;M[addr8]=int8;
1 [1111011i] MOV @Ri,A PC++; M[Ri]=A;
2 [1010011i][addr8] MOV @Ri,direct8 PC+=2;M[Ri]=M[addr8];
2 [0111011i][int8] MOV @Ri,int8 PC+=2;M[Ri]=int8;
1 [10100010][bit8] MOV C,bit8 PC+=2;C=BM[bit8]; C
2 [10100010][bit8] MOV bit8,C PC+=2;BM[bit8]=C;
2 [10010000][intH][int8]MOV DPTR,#int16PC+=3;DPTR=#const16;
2 [10010011] MOVC A,@A+DPTR PC++;A=CodeM[A+DPTR];
2 [10000011] MOVC A,@A+PC PC++;A=CodeM[A+PC];
2 [1110001i] MOVX A,@Ri PC++; A=XM[Ri];
2 [11100000] MOVX A,@DPTR PC++; A=XM[DPTR];
2 [1111001i] MOVX @Ri,A PC++; XM[Ri]=A;
2 [11110000] MOVX @DPTR,A PC++; XM[DPTR]=A;
4 [10100100] MUL AB PC++; B:A=A*B; C OV
1 [00000000] NOP PC++; ;
1 [01001nnn] ORL A,Rn PC++; A |= Rn;
1 [01000101][addr8] ORL A,direct8PC+=2;A |= M[addr8];
1 [0100011i] ORL A,@Ri PC++; A |= M[Ri];
1 [01000100][int8] ORL A,#int8PC+=2;A |= int8;
1 [01000010][addr8] ORL direct8,APC+=2;M[addr8] |= A;
2 [01000011][addr8][int8]ORL direct8,#int8PC+=3;M[addr8] |= int8;
2 [01000010][bit8] ORL C,bit8 PC+=2;C |= BM[bit8]; C
2 [01000000][bit8] ORL C,/bit8 PC+=2;C |= ~BM[bit8];C
2 [11010000][addr8] POP direct8 PC+=2;M[addr8]=M[SP--];
2 [11000000][addr8] PUSH direct8 PC+=2;M[++SP]=M[addr8];
2 [00100010] RET PC++;PCH=M[SP--]=M[addr8]; PCL=M[SP--];
2 [00110010] RETI PC++;PCH=M[SP--]=M[addr8]; PCL=M[SP--];
1 [00100011] RL A PC++;An+1=An; A0=A7;
1 [00110011] RLC A PC++;An+1=An; A0=C; C=A7; C
1 [00000011] RR A PC++;An=An+1; A7=A0;
1 [00010011] RRC A PC++;An=An+1; A7=C; C=A0; C
1 [11010011] SETB C PC++; C=1; C
1 [11010010][bit8] SETB bit8 PC+=2; BM[bit8]=1;
2 [01100000][rel8] SJMP rel8 PC+=2;PC=PC+rel8;
1 [10011nnn] SUBB A,Rn PC++; A = A - Rn - C; C OV AC
1 [10010101][addr8] SUBB A,direct8PC+=2;A = A - M[addr8] - C;C OV AC
1 [1001011i] SUBB A,@Ri PC++; A = A - M[Ri] - C; C OV AC
1 [10010100][int8] SUBB A,#int8PC+=2;A = A - int8 - C; C OV AC
1 [11000100] SWAP PC++; A3-0 <=> A7-4
1 [11001nnn] XCH A,Rn PC++; A <=> Rn;
1 [11000101][addr8] XCH A,direct8PC+=2;A <=> M[addr8] - C;C OV AC
1 [1100011i] XCH A,@Ri PC++; A <=> M[Ri];
1 [1101011i] XCHD A,@Ri PC++; A3-0 <=> M[Ri]3-0;
1 [01101nnn] XRL A,Rn PC++; A ^= Rn;
1 [01100101][addr8] XRL A,direct8PC+=2;A ^= M[addr8];
1 [0110011i] XRL A,@Ri PC++; A ^= M[Ri];
1 [01100100][int8] XRL A,#int8PC+=2;A ^= int8;
1 [01100010][addr8] XRL direct8,APC+=2;M[addr8] ^= A;
2 [01100011][addr8][int8]XRL direct8,#int8PC+=3;M[addr8] ^= int8;

Instructions by Cycle
1OP A,Rn; OP A,direct8; OP A,@Ri; OP A,#int8; ALL Rotates; SWAP; DA A;
2 All Jumps; All Calls; POP; PUSH; RET; RETI;
OP direct8,#int8; OP C,bit8;
MOV Rn,direct8; MOV direct8,Rn; MOV direct8,direct8; MOV direct8,@Ri; MOV @Ri,direct8;
MOV bit8,C; MOV DPTR,#int16; MOVC; MOVX;
INC DPTR;
4MUL AB; DIV AB;

8051 architecture and instruction set:

"Copyright 2004.10.17 by Francis G. Wolff, fxw12@case.edu"
version 1.0
additional contributions and corrections welcomed!