Reading will be assigned as the semester progresses, so that we can tailor the class to the interests of the participants.

January | 13 | 15 |
---|---|---|

20 | 22 | |

27 | 29 | |

February | 3 | 5 |

10 | 12 | |

17 | 19 | |

24 | 26 | |

March | 3 | 5 |

Spring | Break | |

17 | 19 | |

24 | 26 | |

31 | ||

April | 2 | |

7 | 9 | |

14 | 16 | |

21 | 23 |

*Additional reference on Simulated Annealing*:

D.S. Johnson, C.R. Aragon, L.A. McGeoch, and C. Schevon,
"Optimization by Simulated Annealing: An Experimental
Evaluation; Part I: Graph Partitioning,"
*Operations Research*,
Vol. 37, No. 6, November-December 1989, pp. 865 - 892.

*Additional references on the Primal-Dual algorithm*:

C.-W. Yeh, C.-K. Cheng, and T.-T.Y. Lin,
"A General Purpose Multiple Way Partitioning Algorithm,"
*Proceedings of the 28th ACM/IEEE Design Automation Conference*,
1991, pp. 421 - 426.

Y.-C. Wei and C.-K. Cheng,
"Towards Efficient Hierarchical Designs by Ratio Cut Partitioning,"
*Digest of Papers from the 1989 International Conference on
Computer Aided Design (ICCAD)*,
1989, pp. 298 - 301.

*Additional references*:

N.R. Quinn, Jr.,
"The Placement Problem as Viewed from the Physics of
Classical Mechanics,"
*Proceedings of the Design Automation Conference*,
1975, pp. 67 - 72.

C.-K. Cheng and E.S. Kuh,
"Module Placement Based on Resistive Network Optimization,"
*IEEE Transactions on Computer-Aided Design of
Integrated Circuits and Systems*,
Vol. CAD-3, No. 3, July 1984, pp. 218 - 225.

*Additional references*:

K. Chaudhary and P. Robinson,
"Channel Routing by Sorting,"
*IEEE Transactions on Computer-Aided Design*,
Vol. 10, No. 6, June 1991, pp. 754 - 760.

D. Wang,
*Proceedings of the 28th ACM/IEEE Design Automation Conference*,
1991.

*Additional reference*:

N.-S. Woo,
"A Heuristic Method for FPGA Technology Mapping Based
on Edge Visibility,"
*Proceedings of the 28th ACM/IEEE Design Automation
Conference*,
1991, pp. 248 - 251.

There are some notes on parts of Walker's paper that came out too dark to read in the photocopies.

*Francis Martin* will talk about his current research
in the test of embedded systems.

Final project presentation.

*Meyyapan Ramanathan* will talk about high level
synthesis for digital signal processing applications.
Here is
the abstract for his talk.

*Tarachand Pagarani* will talk about design verification
borrowing techniques from circuit testing.
Here is
the abstract for his talk.

*Elie Yarack* will talk about design-for-testability
at a high level of design abstraction.
Here is
the abstract for his talk.

*Ben Floering* will talk about over-the-cell routing.
Here is
the abstract for his talk.

*Li Tianliang* will talk about test of embedded
systems.
Here is
the abstract for his talk.

*Jake Garver* will talk.
Here is the abstract for his talk.

*Shuyu Lei* will talk.
Here is the abstract for his talk.

Here is a link back to the ECMP 486 Home Page.

Joan Carletta, carletta@ces.cwru.edu