0. TABLE OF CONTENTS | 1. INTRODUCTION | 2. CIRCUIT DESCRIPTION |
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3. CIRCUIT ELEMENTS AND MODELS | 4. ANALYSES AND OUTPUT CONTROL | 5. INTERACTIVE INTERPRETER |
6. BIBLIOGRAPHY | APPENDIX A | APPENDIX B |
The SPICE3 version is based directly on SPICE 2G6 (1983). While SPICE3 is being developed to include new features, it continues to support those capabilities and models which remain in extensive use in the SPICE2 program. Andrei Vladimirescu, K.Zhang, Arthur Richard Newton, D.O.Pederson, Dr. Richard Dowell and Dr. Sally Liu have contributed to early developments of the SPICE2 (1975) versions. SPICE (1972) was originally developed by Dr. Lawrence Nagel and has been modified extensively by Dr. Ellis Cohen.
SPICE has built-in models for the semiconductor devices, and the user need specify only the pertinent model parameter values. The model for the BJT is based on the integral-charge model of Gummel and Poon; however, if the Gummel-Poon parameters are not specified, the model reduces to the simpler Ebers-Moll model. In either case, charge-storage effects, ohmic resistances, and a current-dependent output conductance may be included. The diode model can be used for either junction diodes or Schottky barrier diodes. The JFET model is based on the FET model of Shichman and Hodges. Six MOSFET models are implemented: MOS1 is described by a square-law I-V characteristic, MOS2 [1] is an analytical model, while MOS3 [1] is a semi-empirical model; MOS6 [2] is a simple analytic model accurate in the short-channel region; MOS4 [3, 4] and MOS5 [5] are the BSIM (Berkeley Short-channel IGFET Model) and BSIM2. MOS2, MOS3, and MOS4 include second-order effects such as channel-length modulation, subthreshold conduction, scattering-limited velocity saturation, small-size effects, and charge-controlled capacitances.
Two types of transfer functions are allowed : one of the form (output voltage)/(input voltage) and the other of the form (output voltage)/(input current). These two types of transfer functions cover all the cases and one can find the poles/zeros of functions like input/output impedance and voltage gain. The input and output ports are specified as two pairs of nodes.
The pole-zero analysis works with resistors, capacitors, inductors, linear-controlled sources, independent sources, BJTs, MOSFETs, JFETs and diodes. Transmission lines are not supported.
The method used in the analysis is a sub-optimal numerical search. For large circuits it may take a considerable time or fail to find all poles and zeros. For some circuits, the method becomes "lost" and finds an excessive number of poles or zeros.
Distortion analysis is supported for the following nonlinear devices: diodes (DIO), BJT, JFET, MOSFETs (levels 1, 2, 3, 4/BSIM1, 5/BSIM2, and 6) and MESFETS. All linear devices are automatically supported by distortion analysis. If there are switches present in the circuit, the analysis continues to be accurate provided the switches do not change state under the small excitations used for distortion calculations.
After calculating the spectral densities, noise analysis integrates these values over the specified frequency range to arrive at the total noise voltage/current (over this frequency range). This calculated value corresponds to the variance of the circuit variable viewed as a stationary gaussian process.
Temperature dependent support is provided for resistors, diodes, JFETs, BJTs, and level 1, 2, and 3 MOSFETs. BSIM (levels 4 and 5) MOSFETs have an alternate temperature dependency scheme which adjusts all of the model parameters before input to SPICE. For details of the BSIM temperature adjustment, see [6] and [7].
Temperature appears explicitly in the exponential terms of the BJT and diode model equations. In addition, saturation currents have a built-in temperature dependence. The temperature dependence of the saturation current in the BJT models is determined by:
XTI |T | | E q(T T )| 1 g 1 0 I (T ) = I (T ) |--| exp|-----------| S 1 S 0 |T | |k (T - T )| 0 1 0where k is Boltzmann's constant, q is the electronic charge, Eg is the energy gap which is a model parameter, and XTI is the saturation current temperature exponent (also a model parameter, and usually equal to 3).
The temperature dependence of forward and reverse beta is according to the formula:
XTB |T | 1 B(T ) = B(T ) |--| 1 0 |T | 0where T1 and TT0 are in kelvin, and XTB is a user-supplied model parameter. Temperature effects on beta are carried out by appropriate adjustment to the values of BF, ISE, BR , and ISC (spice model parameters BF, ISE, BR, and ISC, respectively).
Temperature dependence of the saturation current in the junction diode model is determined by:
XTI --- N |T | | E q(T T ) | 1 g 1 0 I (T ) = I (T ) |--| exp|-------------| S 1 S 0 |T | |N k (T - T )| 0 1 0where N is the emission coefficient, which is a model parameter, and the other symbols have the same meaning as above. Note that for Schottky barrier diodes, the value of the saturation current temperature exponent, XTI, is usually 2.
Temperature appears explicitly in the value of junction potential, U (in spice PHI), for all the device models. The temperature dependence is determined by:
| N N | a d kT |------ | U(T) = -- log 2 q e |N (T) | iwhere k is Boltzmann's constant, q is the electronic charge, Na is the acceptor impurity density, Nd is the donor impurity density, Ni is the intrinsic carrier concentration, and Eg is the energy gap.
Temperature appears explicitly in the value of surface mobility, M0 (or UO), for the MOSFET model. The temperature dependence is determined by:
M (T ) 0 0 M (T) = ------- 0 1.5 | T| |--| |T | 0The effects of temperature on resistors is modeled by the formula:
R(T) = R(T0 ) [1 + TC1 (T - T0 ) + TC2 (T - T0)2 ]
where T is the circuit temperature, T0 is the nominal temperature, and TC1 and TC2 are the first- and second-order temperature coefficients.
Failure to converge in dc analysis is usually due to an error in specifying circuit connections, element values, or model parameter values. Regenerative switching circuits or circuits with positive feedback probably will not converge in the dc analysis unless the OFF option is used for some of the devices in the feedback path, or the .NODESET control line is used to force the circuit to converge to the desired state.